The application discloses a method for data conversion at extremely high through-put in a multi-beam laser plotter. The need for such high capacity comes from two sources: the ever-increasing number of features on photomasks, and increasingly sophisticated designs. For both computer displays, consumer TV screens and microelectronic products there is a rapid development towards at the same time larger sizes and smaller elemental cells. The development is most dramatic with semiconductor memories where a photomask could contain a billion elemental geometries or more. Furthermore, the elemental geometries need not be rectangular, but could be of any shape.
The input data file may be in a compacted hierachical format, but during processing the data volume increases immensely (up to 1000–10 000 Gb per mask) and it is impossible to process the data beforehand and store the data until the time of writing. The datapath must therefore have enough processing capacity to convert the data in real time.
Another issue is the necessity of a small address grid. The writing system for semiconductor masks must be capable of writing features specified in units of 10 nm (nanometers) or less. It has been disclosed in European (nanometers) or less. It has been disclosed in European Patent EP 0 467 076 by the same inventor that a combination of time delays and analog power modulation can be used to achieve an arbitrarily small address grid. The same patent also discloses the use of several beams and parallel data paths to increase the through-put of the writing system.
For a writer with two laser beams two parallel data paths may be feasible, but current multibeam writers may use up to 32 beams and simple multiplication of a single-beam datapath would be practically impossible.
There is also a strong desire to have unequal numbers of processors and beams, in particular a much larger number of processors than beams. A second need is to make the system easily scaleable, so that writers for different applications with different requirements on capacity can be configured from standard modules and running identical software.
In United States patent U.S. Pat. No. 5,533,170 a high-throughput multibeam data path based on parallel rasterizers is disclosed. Each rasterizer, “geometry engine”, converts a frame of the pattern to a pixel map where each pixel has a greyscale value from 0 to 16. The bitmaps are distributed to beam boards via a bus system and loaded into a buffer RAM area in each bus board.
The method in U.S. Pat. No. 5,533,170 requires very high processing power. In particular every pixel has to be filled with its proper value and transmitted to the beam boards for writing. This is done by signal processors and custom ASICs. The writing system has a burst pixel rate of 1600 million pixels per second, and extremely high demands are placed on the internal data paths. Therefore a system with parallel buses is used and the result is a complex, costly and inflexible system.
The present invention devices a method for data conversion that can be used on configurations from one beam/one processor to tens of beams/hundreds of processors.